Powering the Next Generation of Semiconductor Test

Mt. Hood

SOC Octal High Density PPMU

The Mt. Hood is a highly integrated System-on-a-Chip (SoC) High Density PPMU solution incorporating 8 independent channels of PPMU.

The interface and control are digital. All analog circuitry is inside the chip. Eight complete and independent channels are integrated into each chip.

For most tester applications, no additional analog hardware needs to be developed or used on a per-pin basis.

Features

  • Per-Pin PMU
      • FV, FI, MV, MI
      • 4 Quadrant Operation
      • –2V to 6.5V FV/MV Range
      • 6 Current Ranges (±2μA, ±20μA, ±200μA, ±2mA, ±15mA, ±50mA)
      • Programmable Voltage and Current Clamps
      • Resistive Load Function (12 Selectable Resistor Values)
      • Reduced Glitch Current Range Changing
  • Protection
      • On-Chip Junction Temperature Monitor
      • Over-Temperature Shutdown Per-Chip
  • Global FORCE/SENSE Connectable to any Channel
  • Remote Sense from Adjacent Channel
  • 100MHz SPI Interface
  • On-Chip Independent DACs to Generate DC Levels
      • 6 DC Levels per Channel
      • 2x 16-bit for Forcing Function
      • 2x 8-bit for Clamps
      • 2x 4-bit for Current Clamps
      • On-Chip Offset and Gain Correction
  • Power Management
      • Independent Output Buffer Power Supply for both positive and negative currents to minimize power (VCCO and VEEO)
  • Monitor
      • Two MV/MI Monitors (one for each 4 channels)
      • Ability to Route any Channel to Either Monitor
      • On-Chip Signal Preconditioning (Optimized for Direct Connection to AD7609B)
  • Package/Power Dissipation
      • 88 Pad, 10mm x 10mm MLF
      • Pdq 150mW/Channel
      • Pstandby 75mW/Channel


      Applications

      • Automated Test Equipment
      • Instrumentation

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