Powering the Next Generation of Semiconductor Test
As an Analog Design Engineer, you will work with a small team to develop leading edge ATE integrated circuits. You will design very complex and highly integrated solutions on leading edge high voltage and mixed voltage/mixed gate process technologies encompassing 65nm CMOS to 100+V BCD with the support and mentorship from Senior Engineers.
- Schematic design and simulation of circuits for a variety of high speed and precision CMOS ATE circuits.
- Layout, verification and post layout simulation of circuits. Include Monte Carlo, SOAC and corner analysis. Mixed signal simulation at channel and chip level.
- Develop innovative circuit architectures to optimize power, performance and density.
- IC characterization and support of test development and qualification for ATE specific parameters and use conditions.
- Bachelors degree in Electrical Engineering; Masters degree preferred
- Solid analog CMOS circuit design fundamentals.
- Ability to design and analyze complex feedback loops. Stability analysis and design of compensation schemes.
- Ability to seamlessly interface with internal and external functions (engineering, manufacturing, application, etc.) to develop leading ATE products.
- Understanding of the IC design, qualification and manufacturing cycle.
- Experience with industry standard analog and mixed signal EDA tools. (Cadence/Mentor Graphics/Tanner. LVS and DRC using Cadence or Mentor tools.)
- Must be able to work onsite in San Diego, CA.
- High voltage (100V+) and mixed voltage (multiple supply rails, 6 or more) design experience a plus.
- Design experience in high speed multi Gbps circuits.
- Design experience in ultra-high accuracy and precision circuits.
- Design experience with BiCMOS process technology.
- ATE specific experience helpful, but not required.
- Behavioral modeling of analog circuits for chip level simulation and validation. ·
- Some level of programming ability a strong plus. Verilog, VerilogA, C, C++.